From 5481848e27fdd4fc859def9841a0283665531a46 Mon Sep 17 00:00:00 2001
From: Benji Dial <benji6283@gmail.com>
Date: Sun, 13 Sep 2020 17:12:29 -0400
Subject: fixed some paging bugs, added fault handlers and new programs

---
 src/kernel/idt.c | 54 ++++++++++++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 52 insertions(+), 2 deletions(-)

(limited to 'src/kernel/idt.c')

diff --git a/src/kernel/idt.c b/src/kernel/idt.c
index 4dc8a36..b789d42 100644
--- a/src/kernel/idt.c
+++ b/src/kernel/idt.c
@@ -103,8 +103,8 @@ void const *syscall_table[] = {
   &sc_memory_info
 };
 
-//these aren't really void (*)()'s, but gcc complains if we take an address of a void, so we give it a type
-typedef void (*isr_t)();
+//these aren't really void ()'s, but gcc complains if we take an address of a void, so we give it a type
+typedef void isr_t();
 
 extern isr_t syscall_isr;
 extern isr_t quit_isr;
@@ -112,6 +112,48 @@ extern isr_t yield_isr;
 
 extern isr_t kbd_isr;
 
+extern isr_t udf_isr;
+extern isr_t dfa_isr;
+extern isr_t tsf_isr;
+extern isr_t npf_isr;
+extern isr_t ssf_isr;
+extern isr_t gpf_isr;
+extern isr_t pff_isr;
+
+__attribute__ ((noreturn))
+void exception_halt(const char *id, uint32_t code, uint32_t eip, uint32_t cs) {
+  char nbuf[11];
+
+  set_log_mode(LOG_PANIC);
+  logsz("Exception #");
+  logsz(id);
+  logsz(" at 0x");
+  u8_hex(cs, nbuf);
+  logsz(nbuf);
+  logsz(":0x");
+  u32_hex(eip, nbuf);
+  logsz(nbuf);
+
+  logsz("\nerror code = 0x");
+  u32_hex(code, nbuf);
+  logsz(nbuf);
+
+  logsz("\ntask name = ");
+  logsz(active_task->name);
+
+  logsz("\ncr3 = 0x");
+  uint32_t cr3;
+  asm (
+    "mov %%cr3, %0"
+  : "=r" (cr3));
+  u32_hex(cr3, nbuf);
+  logsz(nbuf);
+
+  logsz("\nHalting.");
+  while (1)
+    asm ("hlt");
+}
+
 static void register_int(uint8_t n, isr_t *isr, uint8_t dpl) {
   idt[n].addr_low = (uint32_t)isr & 0xffff;
   idt[n].addr_high = (uint32_t)isr >> 16;
@@ -142,6 +184,14 @@ void init_idt() {
 
   register_int(0x21, &kbd_isr, 0);
 
+  register_int(0x08, &udf_isr, 0);
+  register_int(0x08, &dfa_isr, 0);
+  register_int(0x0a, &tsf_isr, 0);
+  register_int(0x0b, &npf_isr, 0);
+  register_int(0x0c, &ssf_isr, 0);
+  register_int(0x0d, &gpf_isr, 0);
+  register_int(0x0e, &pff_isr, 0);
+
   outb(PIC_MCMD, PIC_RESET);
   outb(PIC_SCMD, PIC_RESET);
 
-- 
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